1. Technical Field
The present disclosure relates to a liquid crystal display (LCD) and a method for driving the same, and more particularly, to an LCD and a method for driving the same, in which an error is prevented from being generated in gate-on/off signals due to a coupling noise between gate line and data lines.
2. Discussion of the Related Art
LCDs display picture information using electrical and optical properties of liquid crystals injected into a liquid crystal panel and have several advantageous characteristics of thinness, lightness in weight, low power consumption and so on, compared to other electronic products including cathode ray tubes (CRTs). For these reasons, LCDs are extensively used in a wide variety of applications, including display devices such as display monitors for portable computers, desktop computers, HD imaging systems, and the like.
An LCD includes two substrates and liquid crystals having a dielectric anisotropy are injected between the two substrates. Light transmission through the substrates is controlled by varying strengths of electric fields applied to the substrates, thereby controlling the orientation of the liquid crystals and displaying a desired image. In addition, the LCD includes a liquid crystal panel, a timing controller, and a gate driver and data driver for receiving a timing signal from the timing controller and driving the liquid crystal panel. Typically, the liquid crystal panel includes a plurality of gate lines for delivering a gate selection signal, a plurality of data lines intersecting the gate lines and delivering data for each pixel, and a plurality of pixels each formed at an area surrounded by the gate lines and the data line and connected to each other by the gate lines, the data lines and switching elements.
In LCDs, video data is applied to each pixel in the following manner.
First, when gate-on/off signals are sequentially applied to gate lines, switching elements connected thereto are sequentially turned on. At the same time, image signals, that is, gray voltages, which are applied to respective pixel electrodes in a pixel row, are provided to data lines connected to the turned-on switching elements.
The image signals provided to the data lines are applied to each pixel via the turned-on switching elements. In this manner, the gate-on voltages are sequentially applied to all the gate lines to supply pixel signals to the pixels in all the rows during one frame cycle, thereby completing an image for one frame.
FIG. 1 shows waveforms of gate-on/off signals applied to an LCD according to the prior art.
As shown in FIG. 1, when a gate selection signal CPV activates from a low level to a high level upon the application of a vertical synchronizing start signal STV indicating the start of a frame, gate-on/off signals G1, G2, G3, G4, and G5 sequentially activate from a low level to a high level, respectively, and maintain their high levels. Upon the application of a gate output enable signal OE, the gate-on/off signals G1, G2, G3, G4, and G5 are deactivated from their high levels, respectively.
As illustrated in FIG. 2, at an activation time when the gate selection signal CPV makes a transition from a low level to a high level, a load signal TP triggering the start of an output of transmitted video data is deactivated from a high level to a low level. Upon deactivation of the load signal TP, a coupling noise is generated between the data lines and the gate lines. The coupling noise causes a noise in bias voltages VDD and VSS of the switching elements, resulting in an error in the gate-on/off signals.
The generated noise has an influence upon the gate selection signal CPV. For that reason, an abnormal gate selection signal 10 as shown in FIG. 3 is output, resulting in an abnormal gate-on/off signal 20. The abnormal gate-on/off signal 20 directly causes a poor display quality of the LCD. Thus, a method for preventing an abnormal gate selection signal from being generated due to the coupling noise is required.
Korean Patent Publication No. 2003-0016717 discloses a line inversion driving type LCD capable of removing degradation in display quality by adjusting the pulse width of the gate-on/off signals applied to the gate lines. In the disclosed LCD, a gate-on/off signal applied to a current gate line having a polarity different from its immediately previous gate line has a wide pulse width and a gate-on/off signal applied to a current gate line having the same polarity as its immediately previous gate line has a narrow pulse width, thereby solving degradation in display quality caused by a difference between charging characteristics of the gate lines or an increase in the charging time. However, an error in a gate selection signal is generated by a capacitance between the data lines and the gate lines due to a data signal output to the data lines, resulting in degradation in the display quality.